Design of CMOS Crystal Oscillator with Low Power Consumption

Authors

  • Qichao Zha, Tiejun Lu, Yu Zong, Jianhui Zhang, and Shaoxian Qu Author

Keywords:

Pierce crystal oscillator, decrease amplitude, low power consumption.

Abstract

This work proposes a method to reduce the power 
consumption of Pierce crystal oscillator. This method is base on 
the mechanism of decreasing the clock signal amplitude. The 
circuit proposed in paper is designed based on XFAB 0.35μm 
CMOS technology to produce a 32768Hz clock signal. It operate 
over a supply voltage range 1.8V to 3.6V , a temperature range 
from -45 to 80°C. Spectre simulation results indicate that the 
current consumption of the crystal oscillator is only 254nA at 
3V supply voltages and  27°C  temperature. Performance of the 
crystal oscillator in corner simulations is also observed. This 
low power consumption oscillator will greatly extend the life of 
consumer electronics. 

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Published

21.11.2013

How to Cite

Design of CMOS Crystal Oscillator with Low Power Consumption . (2013). International Journal of Information and Electronics Engineering, 3(6), 630-633. http://ijiee.org/index.php/ijiee/article/view/760