The Performance Analysis of Fast DCT Algorithms on Parallel Cluster Architecture

Authors

  • Atri Sanyal and Swapan K Samaddar, Member, IACSIT Author

Keywords:

Cluster architecture, FDCT algorithm, JPEG, ParallelDCT, Timing Table.

Abstract

Clustered processor, having 16 clusters with 4 
PE’s in each cluster and each PE having two ALU, which can perform simultaneously, is taken. The PE’s operate in a SIMD manner. The cluster and PE can transfer data from one another [1]. 4 FDCT algorithms: - namely i>Vetterli ii> Arai’s iii> Loeffler’s iv> Chen’s are taken into consideration. Our proposed 1D FDCT algorithm, parallel DCT is introduced. Examining all five algorithms using Timing Table it is concluded that percentage utilization is highest  in Parallel DCT than other algorithms making it the most suitable to use 
in a parallel Cluster Architecture. 

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Published

05.05.2012

How to Cite

The Performance Analysis of Fast DCT Algorithms on Parallel Cluster Architecture . (2012). International Journal of Information and Electronics Engineering, 2(3), 369-373. https://ijiee.org/index.php/ijiee/article/view/128