Design and Optimization of CMOS 0.18µm Low Noise Amplifier for Wireless Applications
Keywords:
NSGA-II algorithm, LNA, noise figure, power gain.Abstract
A design and optimization of 3 GHz single ended
Radio Frequency (RF) Low Noise Amplifier(LNA) for wireless
applications using standard UMC 0.18µm CMOS technology is
reported. Designing of RF circuit components is a challenging
job, since even after performing lengthy calculations and
finding parameter values it is less guarantee that the design
performs as expected. In view of this the optimization tool;
Elitist Non-Dominated Sorting Genetic Algorithm (NSGA-II);
has been employed to get the optimized starting values of
components in the design. The obtained NSGA-II parameters
were simulated using Cadence Spectre- RF simulator. The
designed Low Noise Amplifier achieves a power gain of 14.49
dB and a minimum Noise Figure of 1.897 dB is achieved. It
dissipates 11.7 mW of power out of 1.8 V supply.
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