Low Power Voltage Controlled Ring Oscillator Design with Substrate Biasing
Keywords:
CMOS, low power, substrate bias and voltage controlled oscillator.Abstract
In the present work, improved designs for voltage
controlled ring oscillators (VCO) with reverse body bias
technique have been presented. In the proposed designs, output frequencies of VCOs have been controlled by varying the reverse bias voltage with improvement in power consumption. First VCO design with five inverter based delay cell shows frequency variation [1.3733-1.1218] GHz with varying NMOS
substrate bias voltage from 0.0V to -1.5V. Second design with varying PMOS substrate bias from [1.8-3.3] V shows frequency variation of [1.3733-1.0009] GHz. Further, third design with joint substrate biasing of NMOS and PMOS transistors shows frequency variations [1.3251-0.81837] GHz. Power consumption has been reduced with reverse body bias in three proposed circuits Simulations have been performed by using SPICE based on TSMC 0.18µm CMOS technology. Power consumption of VCOs circuit has been compared with earlier reported circuits and proposed circuit’s shows better performance.
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